Homemade wideband SDR receivers

A direct sampling receiver for HF is quite simple in principle: it needs a preamplifier, an analog-to-digital converter and a way to transfer the samples to a computer. Fast ADCs are easy to get but the way to connect one to an ordinary PC wasn't so obvious. The simplest solution I've found is a CY7C68013A board used together with a program called fx2pipe. The board is easy to find on eBay by searching for "fx2lp" and the same chip is also used in S57UUU's UUUSB, someone's DAB TX and the simple software radio peripheral.

The FX2 can also output any continuous stream of 8-bit or 16-bit wide words. It can thus be also connected to a DAC for SDR transmitter experiments. I'll write a separate page on them some day.


Here's a picture of my first version using 8-bit ADC08060 and a dead bug preamplifier built around January 2014:

It used a 30 MHz sampling clock. This results in 30 MB/s of data which can be transferred through USB without way too much lost data. Trying to transfer more than that isn't very reliable. 30 MHz was also convenient because it can be generated by the FX2 itself, so a separate oscillator isn't needed.

I used it to create spectrograms of 0-15 MHz HF spectrum with my own software using the SDL library to draw images.


Then I found a 12-bit ADC from junk and built a new receiver with it:

The preamplifier was built from very basic components: two discrete BJT differential pair stages with an LC low pass anti-alias filter between them. The circuit is built on pieces of perfboard with copper tape on the other side as a ground plane. Initially, the sampling clock came from a 14.910 MHz oscillator so the receiver works on bands from VLF to 7 MHz.

Of course, a good antenna is also important. On HF, the best antenna is usually one that's far from the worst interference sources. I tried a few different antennas and found that a basic ~40 m long inverted L fed against ground rod was overall the best in VLF-7 MHz range. At the feedpoint, there's an isolating matching transformer so that the coax shield is not connected to the ground rod, which reduced noise in LF range.

To improve frequency stability, I decided to use a 7.68 MHz OCXO I already had running at the same place. I multiplied its frequency by two to create a 15.36 MHz sampling clock which slightly increases the data rate going to PC but still seems to work without much lost data. I also added a circuit to feed a low-frequency square wave divided from the clock to detect lost samples but haven't made software support for that yet. The FX2 bus is 16 bits wide, so with a 12-bit ADC, there are unused bits that can be used for purposes like this.


I found a nice program called OpenWebRX and made it work with this receiver. The receiver can be listened at http://sdr.dy.fi/. I also wrote some scripts to make it receive WSPR on 6 bands simultaneously and to provide icecast streams on a couple of popular frequencies.

A Core 2 Duo based PC could barely run one of these things after I had implemented a more optimized digital downconverter algorithm to use with OpenWebRX at these high sample rates. I found dedicating one core to fx2pipe (using taskset) greatly reduced the amount of lost samples but it obviously halved the available CPU time for computation on a dual-core machine. Now it's running on a quad-core PC and can easily run all these.

If someone is interested, I could make the schematics and all the software available some day. Currently the circuit has changed several times and I haven't drawn a complete schematic. The software is also a collection of kludgy scripts with little comments, probably hard to reuse for now.

Some parts of the modified OpenWebRX software is available in my github branch cicddc_experiment, also for csdr.